The present invention relates generally to methods and apparatus for non-destructive testing, and specifically to testing of thin film layers formed in the production of semiconductor devices.
Integrated circuit manufacturers face constant demands to reach higher component densities and faster clock speeds. In response to these demands, the critical dimensions of lithographic patterns formed on semiconductor wafers have been steadily reduced. Moreover, copper, because of its high conductivity and better electromigration properties, has begun to replace aluminum as the conducting material of choice for the metal layers of semiconductor devices. The chemical and physical properties of copper, however, create new problems that must be addressed in the manufacturing process. These problems are exacerbated by the decreasing critical dimensions of the features produced on the wafer.
FIG. 1 is a schematic, sectional illustration of a detail of a semiconductor wafer 20, showing one of the serious problems that can arise in wafer processing. In this illustration, an inter-layer dielectric (ILD) 24 is formed on a silicon substrate 22. Typically, the ILD comprises silicon dioxide or other low-K insulating materials. A feature such as a via 32 (i.e., a recess) is formed in layer 24 by a photolithographic process, as is known in the art, and is to be filled with a conductor, typically copper or tungsten. Although the figure shows a gap between the bottom of via 32 and substrate 22, in practice the width of this gap may be effectively zero. As a consequence of the small critical dimensions used in the photolithography, via 32 has a high aspect ratio, i.e., its height is as great as or greater than its width.
In preparation for filling the via with copper, a barrier layer 26 is first deposited over ILD 24, in order to prevent penetration of copper into the ILD. Layer 26 typically comprises tantalum. The barrier layer must be made thick enough at all points to withstand copper penetration, but not so thick as to unduly reduce the quantity of copper to be deposited in the via. A thin seed layer 28, typically comprising copper, is deposited over barrier layer 26, and the remaining volume of via 32 is filled with copper, typically by electroplating or physical vapor deposition (PVD).
Via 32 should be filled completely by the copper in layer 26. Any deficiency in filling the via will compromise the performance of the device being manufactured. Unfortunately, variations in wafer processing parameters, such as a deviation from a specified pressure and/or temperature while the via is being filled with copper, may lead to the formation of a void 34 within the via. Voids may similarly occur in other recessed structures on the wafer, such as trenches and contact structures. Such embedded voids are virtually impossible to detect by non-destructive defect inspection methods known in the art, such as optical or scanning electron microscope (SEM) surface inspection. The known methods that are commonly available for finding and evaluating voids, such as SEM or TEM in conjunction with cross-sectioning or with a focused ion beam, are destructive, requiring at least local destruction of the water under test, and are time-consuming and costly.
It is an object of the present invention to provide improved methods and apparatus for non-destructive testing of semiconductor wafers in production.
It is a further object of some aspects of the present invention to provide methods and apparatus for detection of voids formed within microelectronic devices in production.
It is yet a further object of some aspects of the present invention to provide methods and apparatus for verifying the thickness of layers deposited on a semiconductor wafer in the course of production.
In some preferred embodiments of the present invention, a test pattern is formed in a surface layer of a semiconductor wafer, for use in verifying the volume of material deposited within recesses on the wafer. The pattern serves particularly to ascertain whether or not voids have occurred in the volume of deposited material. Preferably, the surface layer of the wafer comprises a dielectric layer, in which the pattern is formed by photolithography. Most preferably, the pattern is formed on a scribe line of the wafer. The test pattern comprises a test region and, preferably, a reference region. The test region has multiple recesses formed in the surface layer, which are similar in critical dimensions and aspect ratio to recesses, such as vias, that are formed in functional areas of the wafer. The reference region preferably has no such recesses. In a subsequent process stage, when the vias on the wafer are filled with the next layer of material, typically a metal layer, such as copper, the recesses in the test region are similarly filled. Thus, if voids or other irregularities form within the vias, there are likely to be similar voids or irregularities in the recesses of the test region.
An X-ray microfluorescence analyzer, comprising an excitation source and one or more detectors, is used to determine whether the recesses of the test pattern have been properly filled. When irradiated by the excitation source, the metal layer (or other fill material in the recesses) emits fluorescent X-rays with a characteristic spectrum. The intensity of this emission is proportional to the mass of the emitting material. The X-ray analyzer measures the intensity of the characteristic spectral emission from the test region, preferably by comparison to emission from the reference region. The intensity of the emission from the test region provides an indication of the volume of the metal in that region, i.e., of the quantity of metal filling the recesses. Should the intensity from the test region differ significantly from an expected value, it is an indication that the metal layer has deviated from the proper thickness or volume. In particular, if significant voids have formed inside the metal within the recesses, the emission intensity from the test region will be substantially lower than it would be otherwise. Based on such intensity variations, the X-ray analyzer identifies situations in which voids are suspected to exist, substantially without destructive effects on the wafer.
In other preferred embodiments of the present invention, X-ray microfluorescence measurements are made in an active device area of the wafer, in addition to or instead of measurements made on the test region described above. The measured fluorescence intensity is analyzed in a manner similar to that described above in order to determine whether voids have formed in filled recesses in the device area. Making these measurements on the device area, rather than in the test region, can also provide other essential information about the manufacturing process, such as step coverage and thickness uniformity at the device level for both materials deposition and removal stages.
Although preferred embodiments are described herein with particular reference to void detection in semiconductor wafer processing, it will be appreciated that the principles of the present invention may similarly be applied to detect other types of process faults, as well. These principles are applicable in substantially any situation in which the condition of a material layer inside a recess must be diagnosed, wherein the geometrical characteristics of the recess make other non-destructive testing methods, such as optical methods, unworkable or impractical.
There is therefore provided, in accordance with a preferred embodiment of the present invention, a method for testing the deposition and/or the removal of a material within a recess on the surface of a sample, including:
directing an excitation beam onto a region of the sample in a vicinity of the recess;
measuring an intensity of X-ray fluorescence emitted from the region in a spectral range in which the material is known to fluoresce; and
determining a quantity of the material that is deposited within the recess responsive to the measured intensity.
Preferably, determining the quantity of the material within the recess includes detecting a void formed within the material in the recess. Alternatively or additionally, determining the quantity of the material includes determining a thickness of a layer of the material deposited in the recess.
Preferably, directing the excitation beam includes directing the beam at a test region and a reference region of the sample, and measuring the intensity of X-ray fluorescence includes comparing the fluorescence from the test region to fluorescence received from the reference region. Most preferably, the test region contains the recess, and the reference region has substantially no recesses in its surface.
Preferably, determining the quantity of the material includes analyzing the measured fluorescence responsive to a known depth of the recess.
In a preferred embodiment, the sample includes a semiconductor wafer, and the recess includes a microscopic recess etched into the surface of the wafer. Preferably, the material deposited in the recess includes a metal. Further preferably, irradiating the region includes irradiating a pattern of recesses formed in a test region on the wafer so as to determine how completely the metal has filled vias etched into the surface of the wafer.
There is also provided, in accordance with a preferred embodiment of the present invention, apparatus for testing the deposition of a material within a recess on the surface of a sample, including:
an excitation source, configured to direct an excitation beam onto a region of the sample in a vicinity of the recess;
one or more X-ray detectors, configured to receive X-ray fluorescence emitted from the region, and to generate signals responsive to the received fluorescence; and
a processor, coupled to receive the signals from the one or more detectors and to measure, responsive to the signals, an intensity of the fluorescence in a spectral range in which the material is known to fluoresce, so as to determine a quantity of the material that is deposited within the recess.
Preferably, the excitation source includes an X-ray source with X-ray optics, which focus irradiation from the source onto the region. Most preferably, the apparatus is further configured to translate a focal point of the irradiation over the surface of the sample.
There is further provided, in accordance with a preferred embodiment of the present invention, a semiconductor wafer, including a surface layer in which a test pattern is formed, the test pattern including.
a test region, having a plurality of recesses formed in a surface layer thereof, in which recesses a material is deposited during production of semiconductor devices on the wafer; and
a reference region, substantially without recesses.
The present invention will be more fully understood from the following detailed description of the preferred embodiments thereof, taken together with the drawings in which: